Flexradio/openhpsdr.org/acquisition Logic Driver Download

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  • 8HERMES
  1. Disclaimer This page is not a piece of advice to uninstall FlexRadio Systems PowerSDR v2.8.0 by FlexRadio Systems from your computer, nor are we saying that FlexRadio Systems PowerSDR v2.8.0 by FlexRadio Systems is not a good software application.
  2. Content provided by: FlexRadio Systems Engineering This is a step-by-step guide for manually upgrading or 'flashing' the FLEX-5000 or FLEX-3000 firmware using the automated AutoBurn capabilities of the firmware EXE based extractor/updater program. NOTE: The procedure below is the procedure for updating the FLEX-5000 and FLEX-3000's firmware from a downloaded executable file.

The HPSDR Project

Q. I have a question that is not covered in this FAQ. How/who do I ask?

FLEX-6400 Signature Series SDR Transceiver w/ Automatic Antenna Tuner. FLEX-6400 Signature Series SDR Transceiver. Maestro Control Console for the FLEX-6000. 00-17-D6 Bluechips Microhouse Co.,Ltd. 00-17-D7 ION Geophysical Corporation Inc. 00-17-D8 Magnum Semiconductor, Inc. 00-17-D9 AAI Corporation 00-17-DA Spans Logic 00-17-DB CANKO TECHNOLOGIES INC. 00-17-DC DAEMYUNG ZERO1 00-17-DD Clipsal Australia 00-17-DE Advantage Six Ltd 00-17-DF Cisco Systems 00-17-E0 Cisco Systems 00-17-E1 DACOS.

A. After searching for an answer and not finding it, usually the best way is to post your question on the HPSDR Discussion List (reflector).This allows two things to happen: (1) it permits someone other than the very busy developers to answer he question if they can, and (2) it allows everyone on the list to gain the benefit of any reply.

Hpsdr

Q. How do I get in direct email contact with project leaders?

A. The project leaders are active on the HPSDR Discussion List and you may contact them by posting a message to the list.

Q. What is the status of the various boards or modules?

A. Here's the scoop on some as of February 20, 2010:

  • ATLAS - in production, order through http://tapr.org
  • PINOCCHIO - in production, order through http://tapr.org
  • OZY - 1st production run - Sold out - PCB are available. Order through http://tapr.org
  • JANUS - 1st production run - currently being shipped. Order through http://tapr.org
  • MERCURY - 1st production Order through http://tapr.org
  • MERCURY-EU - alpha - see Gerd, DJ8AY
  • PENELOPE - 1st production run - Sold Out - PCB are available Order through http://tapr.org, available from Gerd, DJ8AY
  • LPU - in production - available in kit form. Order through http://tapr.org
  • ALEX - Pre-production
  • PENNYWHISTLE - Order through http://tapr.org
  • EXCALIBUR - Order through http://tapr.org
  • PANDORA - Order through http://tapr.org
  • MAGISTER - Order through http://tapr.org

Dt research laptops & desktops driver. All others - in various stages of design/development -- see their wiki pages or the HPSDR website.

Q. What modules would I need to get a working HPSDR transceiver on the air?

A. It is important to remember the goals of HPSDR. All modules are not meant to be combined together to make a 'single flavor' HPSDR transceiver. A number of different combinations will be possible (examples: Horton or Mercury for the receiver). How the modules are used and combined are in the hands of the experimenter/builder. Some users may not even wish to make an entire transceiver out of the modules (example: SDR1000 owners who only want to use Atlas, Ozy, and Janus to replace their sound cards).

In the words of Phil Covington, project leader for a number of the modules, 'HPSDR was not formed to be a manufacturer of finished Ham Radio equipment. Its primary purpose is to develop a High Performance SDR in a modular fashion by experimentation with various methods.'

If your only goal is to get 'on the air' with an SDR transceiver, there may be cheaper and/or easier routes to achieve this goal (Softrock or Flexradio).

If your goal is high performance software defined radio with a 'roll your own' mentality, then the HPSDR modules should enable the creation of your own high performance SDR transceiver.

Q. Will the modules be offered in kit or assembled form, and what about cost?

A. Atlas and Pinocchio are offered as a bare board and kit of parts. Ozy and Janus are offered either bare board orassembled and tested. A hard to get partial parts kit is being offered or Janus. Future module costs to be determined.

Q. Will Ozy and Janus 'bare boards' be available?

A. Bare boards (not kits of parts) are available through TAPR.

Q. Why doesn't TAPR offer a kit of parts or at least the hard to obtain parts for Ozy or Janus?

A. A partial kit of harder to obtain parts is being offered for Janus. Potential users may certainly get together for a group buy on other parts needed to complete the boards. There are several reasons for TAPR (or HPSDR) not offering complete kits: (1) being an all-volunteer organization, it would take tremendous manpower to break the parts down to individual kits and package them, (2) there is a very large support problem for kit builders whose boards do not work when completed, and (3) the cost of a kit of parts would be about equal or may exceed the cost of an assembled and tested board.

Q. Will the Gerber files (PCB artwork) be available for anyone's use?

A. Yes. They are released under the new TAPR open source hardware license called OHL. The board designer may restrict to non-commercial use. The OHL license was finalized and approved in May 2007. For License information see Open hardware license or Non-Commercial hardware license. The Schematics, Gerber files and Bill of Materials (BOM) area available of the Support webpage.

Q. Why not put OZY and JANUS on a single board?

A. The overall HPSDR project design philosophy has been to partition the design into modules small enough to allow experimentationwith part and design changes and to be able to put together a system meeting individual needs. Putting the ADC chip with associatedcircuit on the Janus board allows a future (and hopefully better) chip to be used on a similar board, but keeping Ozy for the interfaceand control. Flexibility is the goal.

Q. How much better will the Ozy-Janus combination be in terms of performance when used with the SDR-1000 in place of a sound card such as the Delta 44?

A. To be determined -- but of course, we expect better results. There are some preliminary results on the wiki and in the discussion list.

Q. Will a Ozy-Janus-Atlas combination work with my PowerSDR software used for my Flex Radio SDR-1000 in place of a sound card in my PC?

A. Yes, that was one of the early goals of the HPSDR group. Phil, VK6APH, did confirm with Gerald and Eric at the Flex-Radio meeting at the Dayton Hamvention 2007 that Ozy/Janus will be fully supported in future releases in their 'mainstream' releases of PowerSDR. Bill, KD5TFD, will be working with Eric from Flex to accomplish this. At this point it is not known exactly when, and what version the support will begin, but it will happen. Direct all questions regarding Janus/Ozy to the HPSDR Discussion List (and NOT the Flex-Radio list), as folks have been doing and admirably responding. The arrangement with Flex-Radio required the donation of a working Ozy/Janus to Flex-Radio and this has been accomplished after TAPR approved the expense.

Q. What will be an appropriate software for companions like Janus + Ozy + Phoenix + (Alex??) ?

A. These boards, and also with the addition of Mercury, will run using PowerSDR. --Phil VK6APH

Q. Is the HPSDR project going to use Windows or some flavor of Linux?

Logic

A. Yes! (Eventually both, that is..but, currently, the supported OS is WinXP). There is currently work being done for Linux and dttsp.

Q. What are the recommended minimum system requirements for the PC I will use for the HPSDR?

A. USB 2.0 is a requirement. Currently, the OS recommendation is WinXP. Windows 2000 is NOT recommended as the USB 2.0 stack on Windows 2000 is just too slow.

At this time, there are no solid recommendations for minimum CPU or RAM that are based on actual testing with HPSDR hardware of how low we can go.

FlexRadio does have Minimum Recommended PC Configurations for systems using the PowerSDR software. Since the HPSDR hardware may use PowerSDR, these specs are probably a good guide to what would be advisable for the HPSDR. FlexRadio's numbers from their website are as follows:

  • Processor: Min: 1.5GHz Recommended: 3.2GHz+ or greater
  • Memory: Min: 512MB Recommended: 1GB+ (use the fastest RAM available)

Q. What user name and password do I use to access the HPSDR svn repository?

A. None is required for reading the SVN, only required to place something in the repository. The IP address of the repository is shown on the resources page of the main HPSDR.org website.

Q. Will HPSDR be developed for higher frequencies like those used for satellite and space communications, e.g. VHF, UHF and Microwave?

A. There is a group doing SDR for microwave: [1] Current HPSDR projects could certainly be used as an IF for a transverter, but there is nothing going on with HPSDR that is specifically aimed at microwave.

The HPSDR Wiki

Q. Do I need to log in?

A. Those who contribute by editing the wiki need to have a login.

Flexradio/openhpsdr.org/acquisition Logic Driver Download Software

Q. How do I get a account? (a login)

A. Request it from the wiki system operator, email: Dave, KV0S

Q. What if I find that a correction is needed in the wiki?

A. Reports such as this are welcomed by the wiki system operator, email: Dave, KV0S

ATLAS Backplane

Q. What is the recommended means of powering ATLAS?

A. The LPU or Demeter (not available yet).

The ATX 20 pin power connector on the Atlas board enables the use of standard PC power supplies. (Please Note: There is no reason that you cannot utilize a non-PC power supply regulated and wired to provide the proper voltages to the 20pin connector. A non-PC power supply could also enable custom current limiting of the voltages going to the 20 pin connector, an advisable setup when testing or prototyping boards plugged into ATLAS. An analog power supply may be an attractive option for users particularly concerned about spurious emissions in the HF band which some low cost PC power supplies may produce.)

If you choose to use an ATX computer power supply care should be taken that the -12V current requirement is met. (Note of warning: some versions of the attractive picoPSU do not provide proper -12V current capacity. Check before you buy.)

As a reference for current requirements (reported by Bill Tracey May, 11, 2007), Ozy/Janus used by a SDR100 had the following current usage:

Obviously additional boards connected to the Atlas board will increase these numbers.

Projections of current requirements for other boards are(as reported by Phil Harman, June 6, 2007):

Q. Will the Atlas be offered assembled?

A. Probably not. It is fairly easy to assemble with a very minimal amount of surface mount parts. There are quite a few solder pads due to the 96 pin connectors. If you are not able to do this work yourself, our advice is to ask on the HPSDR Discussion List (reflector) to see if you can pay someone to do the work for you.

Q. Can solder paste and a hot air heat gun (or oven) be used on Atlas for 'all those connections' ?

A. It is possible, but at least one report indicates problems with the center row on the connectors. If considering doing this, we suggest you ask on the discussion list. If anyone has had success or failure, please report it to the wikisysop so we can update this reply.

Q. Will a larger (or smaller?) number of slots version be offered?

A. Possibly, if the need and demand warrant. Nothing is in the plans right now (as of May 2007).

Q. I don't see assignment of all the bus pins. Is there a list somewhere?

A. Some are not assigned a function yet, due to the developing nature of the HPSDR project and the use of the FPGA.

PINOCCHIO Extender

Q. Availability?

A. The bare board and connectors are now available from TAPR http://tapr.org

OZY

Q. Will the USB connection from Ozy to my PC require anything special in terms of USB port specification or drivers?

A. A USB 2 connection will be required on the PC. Most modern PCs have this as standard. With MS Windows, for the USB driver we are using the LibUsb-Win32 library which is a free download from http://libusb-win32.sourceforge.net/ A Linux version is also available, see http://www.linux-usb.org/ and http://libusb.sourceforge.net/ . Experience will tell us if there are any problems with certain types of USB2 ports.

Q. Why do we need a 'configuration device' when the software can just load the FPGA via USB and the Cypress CY7C68013 (FX2) chip? The schematic shows the programming pins connected from FX2 GPIO pins to FPGA.

A. It does load via USB and this is how OZY is normally used. BUT, there will come a time when someone wants to use the OZY without PC attached and the configuraton device allows this possibility.

Q. Is the design of Ozy such that it can be used for other purposes than SDR?

A. We certainly hope so and expect that some will use it as a learning tool or development platform for other projects not even remotely related to SDR. It provides an inexpensive piece of hardware for many purposes.

JANUS

Q. Is Janus a 'sound card' ?

A. NO! The usual meaning of a sound card is one which plugs into a personal computer (ISA, PCI, or other bus). The Janus module plugs into our Atlas bus and contains some of the components of the usual sound card. It also requires the Ozy or similar interface to use it in applications which call for a PC sound card.

Q. Will I be able to use Janus for other non-SDR sound applications with my PC?

A. In theory, Yes! This will require a Windows or Linux driver; there is no reason one can't be written, we just need a volunteer!


PENELOPE

Q. Why are there no output RF filters on the Penelope PCB?

A. This is due to a number of reasons. Firstly, whilst Penelope is primarily an HF ( and VHF/UHF on alias) exciter it can be used for other functions. For example, when used with Mercury it can form a low level signal source as a tracking generator or VNA. For these functions the lack of output filters is an advantage.

Secondly, Penelope generates RF directly at the desired output frequency by synthesizing the required RF waveform using a DAC. The lack of mixers, DDS, frequency synthesizer etc means the output spectrum of Penelope is particularly clean. In fact the spurious output at 0.5w meets the FCC requirements without additional filtering.

Thirdly, Penelope is an exciter. Whilst we expect it will be used by QRP operators as is we also expect it to be used to drive a higher power amplifier. In the latter case the user will most likely provided external filtering as part of this power amplification.

Fourthly, Penelope does provide a 55MHz LPF that can be placed in circuit after the DAC and prior to the 0.5W PA. If desired the user can add external bandpass filters here. Alternatively, the filter can be bypassed and/or an external VHF/UHF filter fitted such that the alias output of the DAC can be used on the higher bands.

Fifthly, if is desirable to use LPFs that may be also be used before Mercury. The IP3 performance of Mercury is very good and using small inductors, that are quite acceptable for removing the harmonics from Penelope, results in a significant degradation in IP3 performance.

An external set of filters will be provided as part of the Alex project.

Additionally, HPDR is a journey and not a destination! We fully expect higher performance DACs to be come available in the future. These newer devices will still require some form of output filtering. By using external filters the cost of replacing the exciter board is reduced.


HERMES

General

VK6APH first Hermes QSO with ER5GB on 17M December 20, 2009



Q. What is the Hermes HPSDR Project?

A. Hermes extends the successful OpenHPSDR Mercury, Penelope and Atlas on one PCB board with one FPGA. We do not see Hermes as the ultimate project, just a convenient version in a small package. Many will find the small package inconvenient for the add-on like Excalibur or specialized experimentation.

Hermes is designed to be an experimental platform to encourage future development. Hermes is NOT a commercial turn-key product. If you are looking for a full featured out-of-the-box SDR transceiver, you should look at the units from Flex-Radio or similar companies.

caption (click for larger image) photo courtesy Phil Harman VK6APH


Q. What is the overall architecture of the Hermes Transceiver?

A. Athena Software Framework <---> Hermes <---> Apollo <---> Antenna <--->


caption (click for larger image) photo courtesy Phil Harman VK6APH


Q. Who are the contributing members of the Hermes Project?

A. this truly is an International collaborative open hardware open software project

  • Kevin Wheatley M0KHZ Project Leader
  • Tony = Anthony Taylor based in Singapore (no call sign) - Schematics & PCB layout.
  • Phil Harman - VK6APH - Software & hardware development, especially the brain wave for maintaining full DAC bits while reducing power.
  • Bill Tracey - KD5TFD - Component sourcing and kitting
  • Lyle Johnson - KK7P - significant contributor to hardware development
  • Scotty Cowling - WA2DFI - Orcad licensing & general advice
  • Graham - KE9H - Hermes PA improvements
  • Plus numerous others via the reflector.
  • Apollo was conceived by Kjell Karlsen - LA2NI


Q. Where is the Hermes Project Wiki?

A. see HERMES


Q. What is the History of the Hermes Project?

A. http://openhpsdr.org/hermes.html

Hermes - A proposed DUC/DDC Transceiver

Project Leader: Kevin M0KHZ

Following the outstanding success of Mercury and Penelope, and while investigating the verilog code for both, I had the insane idea of merging the Verilog code of Mercury and Penelope into a single FPGA! I played around with this idea for a while and the more I thought about it the more I liked the idea.

So here is the proposal, to develop a single board HPSDR based on the hardware of Mercury and Penelope and a single large FPGA.

This board would have PC connectivity by USB. I'm planning to squeeze this all onto Euro Card sized PCB (100 x 160 mm), and if I utilize both sides I might even have room for a Pennywhistle type PA :).


Q. What are the Objectives of the Hermes Project?

A. http://openhpsdr.org/hermes.html Hermes is simply the Mercury, Penelope and Atlas on one board with one FPGA. It also includes the signal processing circuitry from Excalibur so an external 10MHz reference (which can be GPS locked) can be used.

We do not see Hermes as the ultimate project, just a convenient version in a small package. Since there is no equivalent to the Atlas bus it does not support the expansions capabilities of Mercury. Penelope etc.

Hermes is designed to be an experimental platform to encourage future development. Hermes is NOT a commercial turn-key product. If you are looking for a full featured out-of-the-box SDR transceiver, you should look at the units from Flex-Radio or similar companies.


Q. How does the Hermes architecture work?

A. please refer to Hermes

The architecture of the system uses state-of-the-art digital electronics toaccomplish three main functions:

  1. Digital Down Conversion from RF frequencies to baseband for mathematical manipulation(DDC).
  2. Digital Up Conversion from audio frequencies to RF frequencies (DUC).
  3. Modulation (Tx) and Demodulation (Rx), DSP, AGC, Filtering, Noise Blankers, band selection and all the features of a modern transceiver - accomplished by the Computer program on the USB connected Personal Computer.
  • Initially software is being developed by John Melton for Linux and by Phil Harman for Windows. The Flex PowerSDR™ software will also continue to be supported for HPSDR. The specific computer languages don't matter to you unless you are interested in portability among platforms, or perhaps adding your favorite new feature.
  • All this is accomplished using a single PCB (Hermes) and the associated firmware for the FPGA and software for the PC.
Driver
  • The PC software may be split into a 'server' connected to the Hermes via USB and a 'client' Graphical User Interface that runs remotely over the Internet. The net might be inside a single PC, or across the room in your shack, or across the Globe in another country. It will be great fun to see these applications appear and mature over time. This is part of the Hermes Experimental experience.
  • Hermes is a great success story that begins with the robust OpenHPSDR system on the Atlas backplane (motherboard). Hermes stands on the shoulders of Mercury(Rx), Penelope(Tx), Pennywhistle(PA), Ozymansias(Control and Interface), and the suite of boards offered to the experimenter in the HPSDR arena.
  • Just as OpenHPSDR offers a full transceiver using DDC/DUC, Hermes will offer similar functions at a lower entry price point and in a smaller configuration. The software is being designed to be functionally similar for both systems.

Important things to note:

  • Receiver is functionally separate from the transmitter but shares part of the FPGA chip. The receiver runs concurrently and is in FULL DUPLEX with the transmitter portion.
  • The Receiver includes both lowpass filtering, attenuation, and preamplification as desired by the operator.
  • The transmitter portion has both an output for a transverter and it has the special interface to the Apollo Power Amplifier containing T/R circuitry, lowpass filters and antenna tuner.
  • There are 4 voltages needed by various circuits. These are derived from a single 13.8 VDC connection (from a common Ham power supply). The switching voltage translation is accomplished by a highly efficient switching power supply specifically designed for this purpose and included as part of the Hermes PCB.
  • The logic elements of the FPGA are configured using Verilog programming. Because the FPGA is such an amazing device, the receiver logical elements and algorithms and the transmitter logical elements and algorithms are able to operate concurrently inside the FPGA chip. In receiving there are Decimating Filters and in the transmitter there are Interpolating Filters.
  • The Decimating filters reduce the sample rate from 122.88Msps to 192/96/48ksps as selected by the user. Decimation trades bandscope bandwidth for data rate; the lower data rates are necessary so a standard PC can undertake the rest of the signal processing.
  • The Interpolating Filters increase the sample rate from 48ksps to 122.88Msps to comply with the Nyqyist criteria.
  • Control of the Hermes is provided by the convenient USB port to a PC. The internal Hermes FX2 microprocessor takes care of command and control signals from the PC and responds accordingly.
  • Built in Altera USB Blaster™ for updating of FPGA code via USB
  • 7 user configurable open collector outputs, independently selectable per band and Tx/Rx (for relay control etc - with sequencing via KK software) separate open collector PTT connection for amplifier etc control with sequencer.
  • Mic PTT jumper selectable from tip or ring connection
  • Bias for Electret microphones via jumper
  • 4 user configurable 12 bit Analogue inputs (for ALC, SWR etc)
  • 3 user configurable digital inputs ( for Linear over temp etc)
  • Highly efficient switching power supply, less than 330mA (receive) from 13.8 supply rather than wasting heat in an IC regulator.
  • I2C bus connector for control of external equipment with full documentation.
  • Full duplex operation, any split over entire 160m to 6m range
  • Full QSK - DSP is not used in PC for CW carrier generation (KK software)
  • Up to 8 simultaneous receivers (off one antenna) with suitable PC software.
  • Diode protected USB interface.
  • Low level transmitter output for transverter use (0dBm) as well as user selectable output attenuator
  • Stereo audio outputs at line and headphone levels
  • Inbuilt 1W stereo audio amplifier for directly driving speakers
  • Direct, debounced, connections for CW key (straight or iambic) and PTT
  • 122.88MHz master clock can be phase lock to an internal 10MHz TCXO or external reference
  • Jumper selectable external reference, with signal processing, to suit numerous GPS locked 10MHz reference sources
  • Direct ribbon cable interface to Apollo 20W PA and LPFs or Alex LPFs/HPFs.
  • Hermes will support pre-distortion to reach for the best possible transmitted signal. This feature is planned for a future software implementation.
  • Hermes Tx will support ESSB (enhanced SSB) and 6Khz AM limited not by the hardware, but on the software package you are using.


Q. Where is the software and firmware for Hermes?

A. The proposed OpenHPSDR Hermes Graphical User Interface software implementations are:

  • PowerSDR™ Flex-Radio Corporation with KD5TFD mods.
  • KISS Konsole Beautiful C# fundamentals by Phil Harman VK6APH.
  • Ghpsdr John Melton G0ORX/N6LYT.
  • Athena Software Framework.
  • The 'firmware' commands for the FPGA, ADC,DCA, and FX2 should be loaded automatically or stored in non-volatile memory chips in the system. Firmware may be uploaded easily with the built in (on board) Altera USB Blaster™ for updating firmware via USB.

Resources

Q. Where is the OpenHPSDR mailing list?

A. Please follow these links to the archives, subscription information and main webpage.

  • http://lists.openhpsdr.org/pipermail/hpsdr-openhpsdr.org/ archives
  • http://lists.openhpsdr.org/listinfo.cgi/hpsdr-openhpsdr.org subscriptions
  • http://openhpsdr.org/ main organization webpage


Q. Who do I call for help?

A. The group helps eachother via the HPSDR email list. In the future there may be more frequent use of the 'Teamspeak' Voice over IP technology to provide interactive help as well.


Q. Where are the schematics?

A. Schematics are being published as they are solidified and then when the production boards are manufactured.


Q. Where are the board layout files?

A. Board layout diagrams will be made available as Hermes moves closer to production.


Q. Where are the Verilog files?

A. The FPGA Verilog files will be stored in the SVN (SubVersion Repository) as they are made available.


Q. Where is the Users Manual?

A. (to be developed)


Q. Where is the Builders Manual?

A. The Hermes boards will be pre-built (manufactured) due to the complexity of the Surface Mount Technology and the difficulty of home soldering (0.5mm lead centers). At this time no Builders Manual is outlined. However as Apollo or other boards are married to Hermes it may be appropriate to have a Builders Manual with suggestions for successful chassis layout and connectors.


Q. Where is the Troubleshooting Guide?

A. (to be developed)


Q. Is there an in-depth technical manual?

A. (to be developed)


Q. Where can I get the orientation and training DVD?

A. To learn all about Digital Down Converter technology, please purchase DVD #6 from (Amateur Radio Video News) in which Phil Harman VK6APH teaches us the practical details from his wonderful presentation at Dayton-2008. The DVD consists of 4 hours of high quality education in DDC by Phil Harman. The ARVN webpage says:

Software Defined Radio
'Through the Looking Glass'
Phil Harman VK6APH leads you on an entertaining, detailed trip through the design of the Mercury SDR receiver. With the A/D converter preceeded only by a bandpass filter, Mercury does everything in software, at a price hams can afford. It is the leading edge in ham radio technolog.


Q. Where can I get a power point presentation for my club meeting?

A. (to be developed)


Q. Is there an online Internet Hermes/Apollo radio for me to control remotely?

A. When the server and client (GUI) software is properly separated and tested, there should be several systems on the Internet to test. We are all looking forward to those experiments.


Q. Where is the Teamspeak voice over Internet activity?

A.

  • http://www.teamspeak.com/ Teamspeak download website
  • 174.132.74.55:9274 OpenHPSDR Teamspeak IP address
  • Reference to the Teamspeak Users Installation Guide (pdf)


Q. Why did OpenHPSDR decide to make this an Open Source design?

A. The whole HPSDR project has followed the community spirit of sharing and making contributions whenever and wherever you can. This is a not-for-profit adventure. There are no paid employees and only the cost of design and manufacture are recovered in the price of the boards.

Technical

caption (click for larger image) photo courtesy Phil Harman VK6APH
click here for Hermes pin out document [[2]]


Q. What is a DDC receiver see Mercury?

A. To learn all about Digital Down Converter technology, please purchase DVD #6 from (Amateur Radio Video News) in which Phil Harman VK6APH teaches us the practical details in his wonderful presentation at Dayton-2008. The DVD consists of almost 6 hours of education in DDC by Phil Harman. There is no better presentation of the DDC fundamentals.

DDC is the abbreviation for the term Digital Down Conversion. DDC receivers are able to finally fulfill the dream that has been expressed in Ham Radio magazines for 50 years – to place the digital processing of analog RF information closer to the antenna. The OpenHPSDR Mercury receiver accomplishes that goal. In the OpenHPSDR Mercury and Hermes projects, the antenna is connected to a modern integrated circuit chip. The chip in this case is a very fast Analog to Digitalconversion device called the LTC2208. The Mercury and Hermes designs are designed to be supplemented by bandpass, attenuation, and pre-amp circuits.


Q.How does the ADC (Analog to Digital) chip work?

A. The Linear Technologies 2208 is a high speed, state-of-the-art, Analog to Digital conversion integrated circuit. The specifications for the LTC2208 can be found on the Linear Technologies website. The LTC-2208 illustrates the beginning of a most exciting new era in Ham Radio. The ADC offers us the ability to convert analog RF signals to digital signals. The conversions happen in the Mercury and Hermes at the blazing rate of 125 Million Samples Per Second! I realize that this is a difficult concept to grasp. There is a great deal of helpful material available on the Internet and from various magazines and books. The ARRL DSP book written by Doug Smith KF6DX has several chapters devoted to various aspects of digital sampling of analog signals. New Linear Technologies devices allow experimetners to build affordable equipment that processes the digital representation of the entire RF spectrum throughout the HF bands (.05Mhz through 55Mhz). Digital processing gives us extraordinary filters, AGC, MDS, BDR and other level handling that is far beyond any of our older analog circuit designs. The software doesn't change values as equipment heats up and image rejection is always at it's mathematically optimum value. The ability of the LTC-2208 to sustain 125 million samples per second couples it to various algebraic and mathematical methods that are processed easily inside a miniature computer like the Cyclone-III FPGA. A CW signal on 3.552Mhz appears on the output pins of the LTC-2208 among the stream of discrete numerical values ranging from -32768 to +32767. The LTC-2208 converts the RF impulses to decimal values using all sixteen bits of it's internal circuitry. During every tick of your wall clock, the LTC-2208 presents one hundred and twenty five million samples of the RF spectrum at it's output pins. Each numerical sample is an aggregate value of the RF energy throughout the HF spectrum. It is the job of the logic elements in the Cyclone III FPGA to interpret, separate, filter, convert, and prepare the numerical values so that they can be post-processed by the Athena software framework. The Athena software will convert the numerical data back into human viewable form using the magic of DSP and Fourier transforms. The digital signals from the LTC-2208 are passed without interference to the Cyclone-III FPGA in a continuous stream where they are processed in real time. The LTC-2208 includes specialized randomization technology that can be selectively turned on to clarify the signal to noise ratio of it's digital output. You may wish to read some of the excellent digital signal processing material available at no cost on the World Wide Web. Terminology such as 'time domain' and 'frequency domain' will easily be related to oscilloscope patterns that we are all familiar with. In addition to the ARRL DSP book, another popular text is The Scientist and Engineer's Guide to Digital Signal Processing By Steven W. Smith, Ph.D.


Q. What is a DUC transmitter or exciter?

A. (to be developed)


Q. What is the designed output power of the Hermes PA?

A. If Hermes is used by itself then the output power is 500mW PEP. If used in conjunction with Apollo PA, lowpass, and T/R board this is designed to produce 10W - 20W output. Technical Tx specifications will be included here in the FAQ as they are made available.


Q. Is the Hermes designed to be FULL DUPLEX?

A. *YES* and cross band from any band to another!


Q. Will the Hermes Tx allow Enhanced SBB (ESSB) or 6Khz AM transmission?

A. Yes, the Hermes hardware does not restrict the bandwidth of the transmitted signal. If your PC supporting software can generate ESSB or 6Khz AM, then your Hermes will do it.


Q. What are the Hermes performance specifications?

A. (to be developed)


Q. What is the function of the Cyclone FPGA Chip?

A. FPGA is the abbreviation for a Field Programmable Gate Array. One of the best discussions about FPGA's is on the Wikipedia. An FPGA is a reconfigurable and programmable set of basic logic elements like gates. All the computers (CPU's) that we use have similar basic logic elements at their most detailed level. Wikipedia says that applications of FPGA's include digital signal processing, software defined radio, aerospace, defense systems, medical imaging, computer vision, speech recognition, cryptography, bioinformatics, and computer hardware emulation. Fortunately, the exciting complexity and reconfigurability of these logic elements can be expressed in human readable form by using a Hardware Description (programming) Language from Verilog(R) called VHDL.


Q. What is the 'CORDIC' algorithm?

A. (from the Wikipedia webpage CORDIC)

CORDIC COordinate Rotation DIgital Computer is a simple and efficient algorithm to calculate hyperbolic and trigonometric functions. It is commonly used when no hardware multiplier is available (e.g., simple microcontrollers and FPGAs) as the only operations it requires are addition, subtraction, bitshift and table lookup.

The modern CORDIC algorithm was first described in 1959 by Jack E. Volder. It was developed at the aeroelectronics department of Convair to replace the analog resolver in the B-58 bomber's navigation computer,[1] although it is similar to techniques published by Henry Briggs as early as 1624. John Stephen Walther at Hewlett-Packard further generalized the algorithm, allowing it to calculate hyperbolic and exponential functions, logarithms, multiplications, divisions, and square roots.

Originally, CORDIC was implemented using the binary numeral system. In the 1970s, decimal CORDIC became widely used in pocket calculators, most of which operate in binary-coded-decimal (BCD) rather than binary. CORDIC is particularly well-suited for handheld calculators, an application for which cost (eg, chip gate count has to be minimised) is much more important than is speed. Also the CORDIC subroutines for trigonometric and hyperbolic functions can share most of their code.

Some good web references are:


Q. How do signals get from the Analog (RF) to the Digital (I/Q) domain?

A.


Q. How do analog (microphone) signals get to the digital domain?

A.


Q. What are the three 'Generations' of SDR technology?

A. The three 'Generations' are:

  1. the Analog Phasing or 'Weaver' method
  2. the 'Tayloe' or QSD (Quadrature Sampling Detector/mixer)
  3. the Direct Down Conversion (DDC/ADC) method


Q. Are there any other Generation-III transceivers?

A. Yes there are several that have appeared in various magazines:

  • The full HPSDR Atlas + Mercury(Rx) + Pennywhistle(Tx) OpenHPSDR
  • Peter Martinez G3PLX RADCOM April 2009
  • Ettus Research LLC USRP2


Q. What is the purpose of the I2C bus in the Hermes project?

A. It's primary use is to send the currently tuned frequency to the Automatic ATU on Apollo. It can also be used to control external I2C peripherals.


Q. Where is the Rx and Tx Image Rejection adjustment?

A. Operator manual image rejection adjustment is NOT required with a DDC base transceiver. The reason one has to deal with image rejection on QSD/QSE is because the IQ signal is in the analog domain and the two analog channels are always slightly different. The perfect quadrature relationship between IQ cannot be maintained since the I and Q analog channels will always be slightly different from each other - just the nature of having two different analog channels. PowerSDR from Flex deals with the image rejection using a sophisticated algorithm.

In the DDC/DUC architecture you don't have IQ in the analog domain, just a plain real signals. The IQ decimation all happens in the digital domain - since it's all math, there's no difference between the I and Q channel processing so there are no image issues. This is not to say it's perfect .. it's only as perfect as the number of bits used in the processing and A/D and D/A channels and a properly constructed FPGA code base.[above description generously contributed: by Bill KD5TFD, Phil VK6APH, and Bob N4HY]


Q. Is the Hermes transceiver reverse polarity protected?

A. Yes, there is protection in the power supply and on each board. Of course the builder should take every possible protection to insure that the power supply is connected properly.


Q. Where is the QSD that I see in so many other SDR designs?

A. There is no Quadrature Sampling Detector or Mixer in the Hermes design. All that work is done with clever mathematics inside the Cyclone FPGA chip using the digitized RF directly from the LTC-2208 Analog to Digital (ADC) chip connected to the antenna (via bandpass/preamp).


Q. What is the Dynamic Range of the Hermes (Mercury) receiver?

A. (to be determined and published)


Q. What is Undersampling?

A. Undersampling is a method used to reach into the VHF/UHF spectrum with the Hermes receiver.


Q. What power supply is recommended?

A. A standard 13.8VDC supply is the design goal. More information will be published as the various Hermes components are assembled and tested.


Q. What High Voltage MOSFET's are used in the (Apollo) Power Amplifier?

A. The PA in Apollo is based in the successful Pennywhistle design - see that schematic for more details or the current Apollo schematic on this Wiki Apollo


Q. Does Hermes include a 'Class-A' bias adjustment?

A. No, the 500mW PA on Hermes operates in Class AB. With a suitable heatsink Apollo could be operated in Class A if required


Q. What commercial Linear Amplifiers will Hermes work with?

A. Since the basic Hermes board produces 500mW an intermediate PA will be required (e.g. Apollo or Pennywhistle) to increase this to a level suitable for driving a commercial Linear. At the 20W PEP level there are numerious amplifers that could be use. Hermes provides dedicated PTT outputs for driving switching a linear as well as seven open collector outputs that, via the PC GUI, can be used to select LPFs, antennas etc.


Q. What is pre-distortion and why is it important to DUC transmitters?

A. Yes, Hermes (as well as Penny) can do pre-distortion since we run full duplex. It is beyond Class A - basically what you do is listen to your Tx signal and compare it to the {ideal} signal you are creating (i.e. your I&Q signals). If they differ then you can 'pre-distort' the I&Q signals so that when it is distorted {modified} in the PA, the result is a linear system. All cell phone Tx use this technique.


Q. Can Hermes operate in the VHF/UHF spectrum?

A. The Hermes Tx is specifically designed to include a 0dBm output suitable for a transverter. Many other solutions are expected when the Hermes reaches production status.


Q. How much data can I expect to pump through a USB 2.0 connection?

A. USB 2.0 is specified at 480Mbits per second. This needs to be split between transmit and recieve. On receive, independant tests have shown as sustained transfer rate of > 35Mbytes per second. This is sufficient to support eight 192KHz wide receivers in real time.


Q. Is there a Linux version of the server and GUI?

A. Yes, John Melton G0ORX/N6LYT is working on both a GTK+ and C++/Qt version for Linux platforms.


Q. Is there an iMAC version of the server and GUI?

A. Not at this time, however there is a large MAC HPSDR community and a port of one of the software suits is expected shortly.

Apollo

Q. What is the Apollo part of the OpenHPSDR project?'

caption (click for larger image) photo courtesy Kjell Karlsen - LA2NI

A. see: APOLLOAPOLLO is to be a companion 15W PA, Low Pass Filter and T/R switching (PIN or relay) for Hermes. The idea is to build a self contained HPSDR Transceiver into a box similar to the one used for the two Alex boards.

The box, made by Hammond has a sliding cover on one of the sides (Series 1455, PN 1455N1601). This cover can be used as Front Panel and behind this a display up to 4 inches may be installed. There will also be space for a controller (Beagleboard or something else). One of the goals is a small platform to use as controllers for a self contained transceiver.

Another goal is current consumption of less than 0,3- 0,4 A on Receive and, based on measurements on the Alpha PCB, looks achievable.Using latching relays for LPF switching will save power. The interface to Hermes will be via SPI and I2C.

The LP Filters will be based on Alex but with only one Antenna connector. The toroids may be smaller (T38 instead of T50). Also the capacitors can have lower voltage ratings. An Antenna Tuner will also be implemented.

Q. What is the Apollo board and do I need it?

A. Apollo Discussion


Q. How is the Apollo board integrated or connected to the Hermes transceiver?

A. Via an 10 pin and 5 pin ICD ribbon cable.

Commercial Sales prohibited

Q. Who sells the OpenHPSDR boards?

A.This has yet to be decided. Hermes will initially be licensed under the non-commercial licences NCL License


Q. Can I build it into my own enclosure (chassis)?

A. Yes. The design is flexible and you are encouraged to build Hermes into whatever configuration pleases you. HPSDR hopes to offer a chassis for Hermes that will be pre-punched for all the attachments and connectors.

Thetis

A. Yes! (Eventually both, that is..but, currently, the supported OS is WinXP). There is currently work being done for Linux and dttsp.

Q. What are the recommended minimum system requirements for the PC I will use for the HPSDR?

A. USB 2.0 is a requirement. Currently, the OS recommendation is WinXP. Windows 2000 is NOT recommended as the USB 2.0 stack on Windows 2000 is just too slow.

At this time, there are no solid recommendations for minimum CPU or RAM that are based on actual testing with HPSDR hardware of how low we can go.

FlexRadio does have Minimum Recommended PC Configurations for systems using the PowerSDR software. Since the HPSDR hardware may use PowerSDR, these specs are probably a good guide to what would be advisable for the HPSDR. FlexRadio's numbers from their website are as follows:

  • Processor: Min: 1.5GHz Recommended: 3.2GHz+ or greater
  • Memory: Min: 512MB Recommended: 1GB+ (use the fastest RAM available)

Q. What user name and password do I use to access the HPSDR svn repository?

A. None is required for reading the SVN, only required to place something in the repository. The IP address of the repository is shown on the resources page of the main HPSDR.org website.

Q. Will HPSDR be developed for higher frequencies like those used for satellite and space communications, e.g. VHF, UHF and Microwave?

A. There is a group doing SDR for microwave: [1] Current HPSDR projects could certainly be used as an IF for a transverter, but there is nothing going on with HPSDR that is specifically aimed at microwave.

The HPSDR Wiki

Q. Do I need to log in?

A. Those who contribute by editing the wiki need to have a login.

Flexradio/openhpsdr.org/acquisition Logic Driver Download Software

Q. How do I get a account? (a login)

A. Request it from the wiki system operator, email: Dave, KV0S

Q. What if I find that a correction is needed in the wiki?

A. Reports such as this are welcomed by the wiki system operator, email: Dave, KV0S

ATLAS Backplane

Q. What is the recommended means of powering ATLAS?

A. The LPU or Demeter (not available yet).

The ATX 20 pin power connector on the Atlas board enables the use of standard PC power supplies. (Please Note: There is no reason that you cannot utilize a non-PC power supply regulated and wired to provide the proper voltages to the 20pin connector. A non-PC power supply could also enable custom current limiting of the voltages going to the 20 pin connector, an advisable setup when testing or prototyping boards plugged into ATLAS. An analog power supply may be an attractive option for users particularly concerned about spurious emissions in the HF band which some low cost PC power supplies may produce.)

If you choose to use an ATX computer power supply care should be taken that the -12V current requirement is met. (Note of warning: some versions of the attractive picoPSU do not provide proper -12V current capacity. Check before you buy.)

As a reference for current requirements (reported by Bill Tracey May, 11, 2007), Ozy/Janus used by a SDR100 had the following current usage:

Obviously additional boards connected to the Atlas board will increase these numbers.

Projections of current requirements for other boards are(as reported by Phil Harman, June 6, 2007):

Q. Will the Atlas be offered assembled?

A. Probably not. It is fairly easy to assemble with a very minimal amount of surface mount parts. There are quite a few solder pads due to the 96 pin connectors. If you are not able to do this work yourself, our advice is to ask on the HPSDR Discussion List (reflector) to see if you can pay someone to do the work for you.

Q. Can solder paste and a hot air heat gun (or oven) be used on Atlas for 'all those connections' ?

A. It is possible, but at least one report indicates problems with the center row on the connectors. If considering doing this, we suggest you ask on the discussion list. If anyone has had success or failure, please report it to the wikisysop so we can update this reply.

Q. Will a larger (or smaller?) number of slots version be offered?

A. Possibly, if the need and demand warrant. Nothing is in the plans right now (as of May 2007).

Q. I don't see assignment of all the bus pins. Is there a list somewhere?

A. Some are not assigned a function yet, due to the developing nature of the HPSDR project and the use of the FPGA.

PINOCCHIO Extender

Q. Availability?

A. The bare board and connectors are now available from TAPR http://tapr.org

OZY

Q. Will the USB connection from Ozy to my PC require anything special in terms of USB port specification or drivers?

A. A USB 2 connection will be required on the PC. Most modern PCs have this as standard. With MS Windows, for the USB driver we are using the LibUsb-Win32 library which is a free download from http://libusb-win32.sourceforge.net/ A Linux version is also available, see http://www.linux-usb.org/ and http://libusb.sourceforge.net/ . Experience will tell us if there are any problems with certain types of USB2 ports.

Q. Why do we need a 'configuration device' when the software can just load the FPGA via USB and the Cypress CY7C68013 (FX2) chip? The schematic shows the programming pins connected from FX2 GPIO pins to FPGA.

A. It does load via USB and this is how OZY is normally used. BUT, there will come a time when someone wants to use the OZY without PC attached and the configuraton device allows this possibility.

Q. Is the design of Ozy such that it can be used for other purposes than SDR?

A. We certainly hope so and expect that some will use it as a learning tool or development platform for other projects not even remotely related to SDR. It provides an inexpensive piece of hardware for many purposes.

JANUS

Q. Is Janus a 'sound card' ?

A. NO! The usual meaning of a sound card is one which plugs into a personal computer (ISA, PCI, or other bus). The Janus module plugs into our Atlas bus and contains some of the components of the usual sound card. It also requires the Ozy or similar interface to use it in applications which call for a PC sound card.

Q. Will I be able to use Janus for other non-SDR sound applications with my PC?

A. In theory, Yes! This will require a Windows or Linux driver; there is no reason one can't be written, we just need a volunteer!


PENELOPE

Q. Why are there no output RF filters on the Penelope PCB?

A. This is due to a number of reasons. Firstly, whilst Penelope is primarily an HF ( and VHF/UHF on alias) exciter it can be used for other functions. For example, when used with Mercury it can form a low level signal source as a tracking generator or VNA. For these functions the lack of output filters is an advantage.

Secondly, Penelope generates RF directly at the desired output frequency by synthesizing the required RF waveform using a DAC. The lack of mixers, DDS, frequency synthesizer etc means the output spectrum of Penelope is particularly clean. In fact the spurious output at 0.5w meets the FCC requirements without additional filtering.

Thirdly, Penelope is an exciter. Whilst we expect it will be used by QRP operators as is we also expect it to be used to drive a higher power amplifier. In the latter case the user will most likely provided external filtering as part of this power amplification.

Fourthly, Penelope does provide a 55MHz LPF that can be placed in circuit after the DAC and prior to the 0.5W PA. If desired the user can add external bandpass filters here. Alternatively, the filter can be bypassed and/or an external VHF/UHF filter fitted such that the alias output of the DAC can be used on the higher bands.

Fifthly, if is desirable to use LPFs that may be also be used before Mercury. The IP3 performance of Mercury is very good and using small inductors, that are quite acceptable for removing the harmonics from Penelope, results in a significant degradation in IP3 performance.

An external set of filters will be provided as part of the Alex project.

Additionally, HPDR is a journey and not a destination! We fully expect higher performance DACs to be come available in the future. These newer devices will still require some form of output filtering. By using external filters the cost of replacing the exciter board is reduced.


HERMES

General

VK6APH first Hermes QSO with ER5GB on 17M December 20, 2009



Q. What is the Hermes HPSDR Project?

A. Hermes extends the successful OpenHPSDR Mercury, Penelope and Atlas on one PCB board with one FPGA. We do not see Hermes as the ultimate project, just a convenient version in a small package. Many will find the small package inconvenient for the add-on like Excalibur or specialized experimentation.

Hermes is designed to be an experimental platform to encourage future development. Hermes is NOT a commercial turn-key product. If you are looking for a full featured out-of-the-box SDR transceiver, you should look at the units from Flex-Radio or similar companies.

caption (click for larger image) photo courtesy Phil Harman VK6APH


Q. What is the overall architecture of the Hermes Transceiver?

A. Athena Software Framework <---> Hermes <---> Apollo <---> Antenna <--->


caption (click for larger image) photo courtesy Phil Harman VK6APH


Q. Who are the contributing members of the Hermes Project?

A. this truly is an International collaborative open hardware open software project

  • Kevin Wheatley M0KHZ Project Leader
  • Tony = Anthony Taylor based in Singapore (no call sign) - Schematics & PCB layout.
  • Phil Harman - VK6APH - Software & hardware development, especially the brain wave for maintaining full DAC bits while reducing power.
  • Bill Tracey - KD5TFD - Component sourcing and kitting
  • Lyle Johnson - KK7P - significant contributor to hardware development
  • Scotty Cowling - WA2DFI - Orcad licensing & general advice
  • Graham - KE9H - Hermes PA improvements
  • Plus numerous others via the reflector.
  • Apollo was conceived by Kjell Karlsen - LA2NI


Q. Where is the Hermes Project Wiki?

A. see HERMES


Q. What is the History of the Hermes Project?

A. http://openhpsdr.org/hermes.html

Hermes - A proposed DUC/DDC Transceiver

Project Leader: Kevin M0KHZ

Following the outstanding success of Mercury and Penelope, and while investigating the verilog code for both, I had the insane idea of merging the Verilog code of Mercury and Penelope into a single FPGA! I played around with this idea for a while and the more I thought about it the more I liked the idea.

So here is the proposal, to develop a single board HPSDR based on the hardware of Mercury and Penelope and a single large FPGA.

This board would have PC connectivity by USB. I'm planning to squeeze this all onto Euro Card sized PCB (100 x 160 mm), and if I utilize both sides I might even have room for a Pennywhistle type PA :).


Q. What are the Objectives of the Hermes Project?

A. http://openhpsdr.org/hermes.html Hermes is simply the Mercury, Penelope and Atlas on one board with one FPGA. It also includes the signal processing circuitry from Excalibur so an external 10MHz reference (which can be GPS locked) can be used.

We do not see Hermes as the ultimate project, just a convenient version in a small package. Since there is no equivalent to the Atlas bus it does not support the expansions capabilities of Mercury. Penelope etc.

Hermes is designed to be an experimental platform to encourage future development. Hermes is NOT a commercial turn-key product. If you are looking for a full featured out-of-the-box SDR transceiver, you should look at the units from Flex-Radio or similar companies.


Q. How does the Hermes architecture work?

A. please refer to Hermes

The architecture of the system uses state-of-the-art digital electronics toaccomplish three main functions:

  1. Digital Down Conversion from RF frequencies to baseband for mathematical manipulation(DDC).
  2. Digital Up Conversion from audio frequencies to RF frequencies (DUC).
  3. Modulation (Tx) and Demodulation (Rx), DSP, AGC, Filtering, Noise Blankers, band selection and all the features of a modern transceiver - accomplished by the Computer program on the USB connected Personal Computer.
  • Initially software is being developed by John Melton for Linux and by Phil Harman for Windows. The Flex PowerSDR™ software will also continue to be supported for HPSDR. The specific computer languages don't matter to you unless you are interested in portability among platforms, or perhaps adding your favorite new feature.
  • All this is accomplished using a single PCB (Hermes) and the associated firmware for the FPGA and software for the PC.
  • The PC software may be split into a 'server' connected to the Hermes via USB and a 'client' Graphical User Interface that runs remotely over the Internet. The net might be inside a single PC, or across the room in your shack, or across the Globe in another country. It will be great fun to see these applications appear and mature over time. This is part of the Hermes Experimental experience.
  • Hermes is a great success story that begins with the robust OpenHPSDR system on the Atlas backplane (motherboard). Hermes stands on the shoulders of Mercury(Rx), Penelope(Tx), Pennywhistle(PA), Ozymansias(Control and Interface), and the suite of boards offered to the experimenter in the HPSDR arena.
  • Just as OpenHPSDR offers a full transceiver using DDC/DUC, Hermes will offer similar functions at a lower entry price point and in a smaller configuration. The software is being designed to be functionally similar for both systems.

Important things to note:

  • Receiver is functionally separate from the transmitter but shares part of the FPGA chip. The receiver runs concurrently and is in FULL DUPLEX with the transmitter portion.
  • The Receiver includes both lowpass filtering, attenuation, and preamplification as desired by the operator.
  • The transmitter portion has both an output for a transverter and it has the special interface to the Apollo Power Amplifier containing T/R circuitry, lowpass filters and antenna tuner.
  • There are 4 voltages needed by various circuits. These are derived from a single 13.8 VDC connection (from a common Ham power supply). The switching voltage translation is accomplished by a highly efficient switching power supply specifically designed for this purpose and included as part of the Hermes PCB.
  • The logic elements of the FPGA are configured using Verilog programming. Because the FPGA is such an amazing device, the receiver logical elements and algorithms and the transmitter logical elements and algorithms are able to operate concurrently inside the FPGA chip. In receiving there are Decimating Filters and in the transmitter there are Interpolating Filters.
  • The Decimating filters reduce the sample rate from 122.88Msps to 192/96/48ksps as selected by the user. Decimation trades bandscope bandwidth for data rate; the lower data rates are necessary so a standard PC can undertake the rest of the signal processing.
  • The Interpolating Filters increase the sample rate from 48ksps to 122.88Msps to comply with the Nyqyist criteria.
  • Control of the Hermes is provided by the convenient USB port to a PC. The internal Hermes FX2 microprocessor takes care of command and control signals from the PC and responds accordingly.
  • Built in Altera USB Blaster™ for updating of FPGA code via USB
  • 7 user configurable open collector outputs, independently selectable per band and Tx/Rx (for relay control etc - with sequencing via KK software) separate open collector PTT connection for amplifier etc control with sequencer.
  • Mic PTT jumper selectable from tip or ring connection
  • Bias for Electret microphones via jumper
  • 4 user configurable 12 bit Analogue inputs (for ALC, SWR etc)
  • 3 user configurable digital inputs ( for Linear over temp etc)
  • Highly efficient switching power supply, less than 330mA (receive) from 13.8 supply rather than wasting heat in an IC regulator.
  • I2C bus connector for control of external equipment with full documentation.
  • Full duplex operation, any split over entire 160m to 6m range
  • Full QSK - DSP is not used in PC for CW carrier generation (KK software)
  • Up to 8 simultaneous receivers (off one antenna) with suitable PC software.
  • Diode protected USB interface.
  • Low level transmitter output for transverter use (0dBm) as well as user selectable output attenuator
  • Stereo audio outputs at line and headphone levels
  • Inbuilt 1W stereo audio amplifier for directly driving speakers
  • Direct, debounced, connections for CW key (straight or iambic) and PTT
  • 122.88MHz master clock can be phase lock to an internal 10MHz TCXO or external reference
  • Jumper selectable external reference, with signal processing, to suit numerous GPS locked 10MHz reference sources
  • Direct ribbon cable interface to Apollo 20W PA and LPFs or Alex LPFs/HPFs.
  • Hermes will support pre-distortion to reach for the best possible transmitted signal. This feature is planned for a future software implementation.
  • Hermes Tx will support ESSB (enhanced SSB) and 6Khz AM limited not by the hardware, but on the software package you are using.


Q. Where is the software and firmware for Hermes?

A. The proposed OpenHPSDR Hermes Graphical User Interface software implementations are:

  • PowerSDR™ Flex-Radio Corporation with KD5TFD mods.
  • KISS Konsole Beautiful C# fundamentals by Phil Harman VK6APH.
  • Ghpsdr John Melton G0ORX/N6LYT.
  • Athena Software Framework.
  • The 'firmware' commands for the FPGA, ADC,DCA, and FX2 should be loaded automatically or stored in non-volatile memory chips in the system. Firmware may be uploaded easily with the built in (on board) Altera USB Blaster™ for updating firmware via USB.

Resources

Q. Where is the OpenHPSDR mailing list?

A. Please follow these links to the archives, subscription information and main webpage.

  • http://lists.openhpsdr.org/pipermail/hpsdr-openhpsdr.org/ archives
  • http://lists.openhpsdr.org/listinfo.cgi/hpsdr-openhpsdr.org subscriptions
  • http://openhpsdr.org/ main organization webpage


Q. Who do I call for help?

A. The group helps eachother via the HPSDR email list. In the future there may be more frequent use of the 'Teamspeak' Voice over IP technology to provide interactive help as well.


Q. Where are the schematics?

A. Schematics are being published as they are solidified and then when the production boards are manufactured.


Q. Where are the board layout files?

A. Board layout diagrams will be made available as Hermes moves closer to production.


Q. Where are the Verilog files?

A. The FPGA Verilog files will be stored in the SVN (SubVersion Repository) as they are made available.


Q. Where is the Users Manual?

A. (to be developed)


Q. Where is the Builders Manual?

A. The Hermes boards will be pre-built (manufactured) due to the complexity of the Surface Mount Technology and the difficulty of home soldering (0.5mm lead centers). At this time no Builders Manual is outlined. However as Apollo or other boards are married to Hermes it may be appropriate to have a Builders Manual with suggestions for successful chassis layout and connectors.


Q. Where is the Troubleshooting Guide?

A. (to be developed)


Q. Is there an in-depth technical manual?

A. (to be developed)


Q. Where can I get the orientation and training DVD?

A. To learn all about Digital Down Converter technology, please purchase DVD #6 from (Amateur Radio Video News) in which Phil Harman VK6APH teaches us the practical details from his wonderful presentation at Dayton-2008. The DVD consists of 4 hours of high quality education in DDC by Phil Harman. The ARVN webpage says:

Software Defined Radio
'Through the Looking Glass'
Phil Harman VK6APH leads you on an entertaining, detailed trip through the design of the Mercury SDR receiver. With the A/D converter preceeded only by a bandpass filter, Mercury does everything in software, at a price hams can afford. It is the leading edge in ham radio technolog.


Q. Where can I get a power point presentation for my club meeting?

A. (to be developed)


Q. Is there an online Internet Hermes/Apollo radio for me to control remotely?

A. When the server and client (GUI) software is properly separated and tested, there should be several systems on the Internet to test. We are all looking forward to those experiments.


Q. Where is the Teamspeak voice over Internet activity?

A.

  • http://www.teamspeak.com/ Teamspeak download website
  • 174.132.74.55:9274 OpenHPSDR Teamspeak IP address
  • Reference to the Teamspeak Users Installation Guide (pdf)


Q. Why did OpenHPSDR decide to make this an Open Source design?

A. The whole HPSDR project has followed the community spirit of sharing and making contributions whenever and wherever you can. This is a not-for-profit adventure. There are no paid employees and only the cost of design and manufacture are recovered in the price of the boards.

Technical

caption (click for larger image) photo courtesy Phil Harman VK6APH
click here for Hermes pin out document [[2]]


Q. What is a DDC receiver see Mercury?

A. To learn all about Digital Down Converter technology, please purchase DVD #6 from (Amateur Radio Video News) in which Phil Harman VK6APH teaches us the practical details in his wonderful presentation at Dayton-2008. The DVD consists of almost 6 hours of education in DDC by Phil Harman. There is no better presentation of the DDC fundamentals.

DDC is the abbreviation for the term Digital Down Conversion. DDC receivers are able to finally fulfill the dream that has been expressed in Ham Radio magazines for 50 years – to place the digital processing of analog RF information closer to the antenna. The OpenHPSDR Mercury receiver accomplishes that goal. In the OpenHPSDR Mercury and Hermes projects, the antenna is connected to a modern integrated circuit chip. The chip in this case is a very fast Analog to Digitalconversion device called the LTC2208. The Mercury and Hermes designs are designed to be supplemented by bandpass, attenuation, and pre-amp circuits.


Q.How does the ADC (Analog to Digital) chip work?

A. The Linear Technologies 2208 is a high speed, state-of-the-art, Analog to Digital conversion integrated circuit. The specifications for the LTC2208 can be found on the Linear Technologies website. The LTC-2208 illustrates the beginning of a most exciting new era in Ham Radio. The ADC offers us the ability to convert analog RF signals to digital signals. The conversions happen in the Mercury and Hermes at the blazing rate of 125 Million Samples Per Second! I realize that this is a difficult concept to grasp. There is a great deal of helpful material available on the Internet and from various magazines and books. The ARRL DSP book written by Doug Smith KF6DX has several chapters devoted to various aspects of digital sampling of analog signals. New Linear Technologies devices allow experimetners to build affordable equipment that processes the digital representation of the entire RF spectrum throughout the HF bands (.05Mhz through 55Mhz). Digital processing gives us extraordinary filters, AGC, MDS, BDR and other level handling that is far beyond any of our older analog circuit designs. The software doesn't change values as equipment heats up and image rejection is always at it's mathematically optimum value. The ability of the LTC-2208 to sustain 125 million samples per second couples it to various algebraic and mathematical methods that are processed easily inside a miniature computer like the Cyclone-III FPGA. A CW signal on 3.552Mhz appears on the output pins of the LTC-2208 among the stream of discrete numerical values ranging from -32768 to +32767. The LTC-2208 converts the RF impulses to decimal values using all sixteen bits of it's internal circuitry. During every tick of your wall clock, the LTC-2208 presents one hundred and twenty five million samples of the RF spectrum at it's output pins. Each numerical sample is an aggregate value of the RF energy throughout the HF spectrum. It is the job of the logic elements in the Cyclone III FPGA to interpret, separate, filter, convert, and prepare the numerical values so that they can be post-processed by the Athena software framework. The Athena software will convert the numerical data back into human viewable form using the magic of DSP and Fourier transforms. The digital signals from the LTC-2208 are passed without interference to the Cyclone-III FPGA in a continuous stream where they are processed in real time. The LTC-2208 includes specialized randomization technology that can be selectively turned on to clarify the signal to noise ratio of it's digital output. You may wish to read some of the excellent digital signal processing material available at no cost on the World Wide Web. Terminology such as 'time domain' and 'frequency domain' will easily be related to oscilloscope patterns that we are all familiar with. In addition to the ARRL DSP book, another popular text is The Scientist and Engineer's Guide to Digital Signal Processing By Steven W. Smith, Ph.D.


Q. What is a DUC transmitter or exciter?

A. (to be developed)


Q. What is the designed output power of the Hermes PA?

A. If Hermes is used by itself then the output power is 500mW PEP. If used in conjunction with Apollo PA, lowpass, and T/R board this is designed to produce 10W - 20W output. Technical Tx specifications will be included here in the FAQ as they are made available.


Q. Is the Hermes designed to be FULL DUPLEX?

A. *YES* and cross band from any band to another!


Q. Will the Hermes Tx allow Enhanced SBB (ESSB) or 6Khz AM transmission?

A. Yes, the Hermes hardware does not restrict the bandwidth of the transmitted signal. If your PC supporting software can generate ESSB or 6Khz AM, then your Hermes will do it.


Q. What are the Hermes performance specifications?

A. (to be developed)


Q. What is the function of the Cyclone FPGA Chip?

A. FPGA is the abbreviation for a Field Programmable Gate Array. One of the best discussions about FPGA's is on the Wikipedia. An FPGA is a reconfigurable and programmable set of basic logic elements like gates. All the computers (CPU's) that we use have similar basic logic elements at their most detailed level. Wikipedia says that applications of FPGA's include digital signal processing, software defined radio, aerospace, defense systems, medical imaging, computer vision, speech recognition, cryptography, bioinformatics, and computer hardware emulation. Fortunately, the exciting complexity and reconfigurability of these logic elements can be expressed in human readable form by using a Hardware Description (programming) Language from Verilog(R) called VHDL.


Q. What is the 'CORDIC' algorithm?

A. (from the Wikipedia webpage CORDIC)

CORDIC COordinate Rotation DIgital Computer is a simple and efficient algorithm to calculate hyperbolic and trigonometric functions. It is commonly used when no hardware multiplier is available (e.g., simple microcontrollers and FPGAs) as the only operations it requires are addition, subtraction, bitshift and table lookup.

The modern CORDIC algorithm was first described in 1959 by Jack E. Volder. It was developed at the aeroelectronics department of Convair to replace the analog resolver in the B-58 bomber's navigation computer,[1] although it is similar to techniques published by Henry Briggs as early as 1624. John Stephen Walther at Hewlett-Packard further generalized the algorithm, allowing it to calculate hyperbolic and exponential functions, logarithms, multiplications, divisions, and square roots.

Originally, CORDIC was implemented using the binary numeral system. In the 1970s, decimal CORDIC became widely used in pocket calculators, most of which operate in binary-coded-decimal (BCD) rather than binary. CORDIC is particularly well-suited for handheld calculators, an application for which cost (eg, chip gate count has to be minimised) is much more important than is speed. Also the CORDIC subroutines for trigonometric and hyperbolic functions can share most of their code.

Some good web references are:


Q. How do signals get from the Analog (RF) to the Digital (I/Q) domain?

A.


Q. How do analog (microphone) signals get to the digital domain?

A.


Q. What are the three 'Generations' of SDR technology?

A. The three 'Generations' are:

  1. the Analog Phasing or 'Weaver' method
  2. the 'Tayloe' or QSD (Quadrature Sampling Detector/mixer)
  3. the Direct Down Conversion (DDC/ADC) method


Q. Are there any other Generation-III transceivers?

A. Yes there are several that have appeared in various magazines:

  • The full HPSDR Atlas + Mercury(Rx) + Pennywhistle(Tx) OpenHPSDR
  • Peter Martinez G3PLX RADCOM April 2009
  • Ettus Research LLC USRP2


Q. What is the purpose of the I2C bus in the Hermes project?

A. It's primary use is to send the currently tuned frequency to the Automatic ATU on Apollo. It can also be used to control external I2C peripherals.


Q. Where is the Rx and Tx Image Rejection adjustment?

A. Operator manual image rejection adjustment is NOT required with a DDC base transceiver. The reason one has to deal with image rejection on QSD/QSE is because the IQ signal is in the analog domain and the two analog channels are always slightly different. The perfect quadrature relationship between IQ cannot be maintained since the I and Q analog channels will always be slightly different from each other - just the nature of having two different analog channels. PowerSDR from Flex deals with the image rejection using a sophisticated algorithm.

In the DDC/DUC architecture you don't have IQ in the analog domain, just a plain real signals. The IQ decimation all happens in the digital domain - since it's all math, there's no difference between the I and Q channel processing so there are no image issues. This is not to say it's perfect .. it's only as perfect as the number of bits used in the processing and A/D and D/A channels and a properly constructed FPGA code base.[above description generously contributed: by Bill KD5TFD, Phil VK6APH, and Bob N4HY]


Q. Is the Hermes transceiver reverse polarity protected?

A. Yes, there is protection in the power supply and on each board. Of course the builder should take every possible protection to insure that the power supply is connected properly.


Q. Where is the QSD that I see in so many other SDR designs?

A. There is no Quadrature Sampling Detector or Mixer in the Hermes design. All that work is done with clever mathematics inside the Cyclone FPGA chip using the digitized RF directly from the LTC-2208 Analog to Digital (ADC) chip connected to the antenna (via bandpass/preamp).


Q. What is the Dynamic Range of the Hermes (Mercury) receiver?

A. (to be determined and published)


Q. What is Undersampling?

A. Undersampling is a method used to reach into the VHF/UHF spectrum with the Hermes receiver.


Q. What power supply is recommended?

A. A standard 13.8VDC supply is the design goal. More information will be published as the various Hermes components are assembled and tested.


Q. What High Voltage MOSFET's are used in the (Apollo) Power Amplifier?

A. The PA in Apollo is based in the successful Pennywhistle design - see that schematic for more details or the current Apollo schematic on this Wiki Apollo


Q. Does Hermes include a 'Class-A' bias adjustment?

A. No, the 500mW PA on Hermes operates in Class AB. With a suitable heatsink Apollo could be operated in Class A if required


Q. What commercial Linear Amplifiers will Hermes work with?

A. Since the basic Hermes board produces 500mW an intermediate PA will be required (e.g. Apollo or Pennywhistle) to increase this to a level suitable for driving a commercial Linear. At the 20W PEP level there are numerious amplifers that could be use. Hermes provides dedicated PTT outputs for driving switching a linear as well as seven open collector outputs that, via the PC GUI, can be used to select LPFs, antennas etc.


Q. What is pre-distortion and why is it important to DUC transmitters?

A. Yes, Hermes (as well as Penny) can do pre-distortion since we run full duplex. It is beyond Class A - basically what you do is listen to your Tx signal and compare it to the {ideal} signal you are creating (i.e. your I&Q signals). If they differ then you can 'pre-distort' the I&Q signals so that when it is distorted {modified} in the PA, the result is a linear system. All cell phone Tx use this technique.


Q. Can Hermes operate in the VHF/UHF spectrum?

A. The Hermes Tx is specifically designed to include a 0dBm output suitable for a transverter. Many other solutions are expected when the Hermes reaches production status.


Q. How much data can I expect to pump through a USB 2.0 connection?

A. USB 2.0 is specified at 480Mbits per second. This needs to be split between transmit and recieve. On receive, independant tests have shown as sustained transfer rate of > 35Mbytes per second. This is sufficient to support eight 192KHz wide receivers in real time.


Q. Is there a Linux version of the server and GUI?

A. Yes, John Melton G0ORX/N6LYT is working on both a GTK+ and C++/Qt version for Linux platforms.


Q. Is there an iMAC version of the server and GUI?

A. Not at this time, however there is a large MAC HPSDR community and a port of one of the software suits is expected shortly.

Apollo

Q. What is the Apollo part of the OpenHPSDR project?'

caption (click for larger image) photo courtesy Kjell Karlsen - LA2NI

A. see: APOLLOAPOLLO is to be a companion 15W PA, Low Pass Filter and T/R switching (PIN or relay) for Hermes. The idea is to build a self contained HPSDR Transceiver into a box similar to the one used for the two Alex boards.

The box, made by Hammond has a sliding cover on one of the sides (Series 1455, PN 1455N1601). This cover can be used as Front Panel and behind this a display up to 4 inches may be installed. There will also be space for a controller (Beagleboard or something else). One of the goals is a small platform to use as controllers for a self contained transceiver.

Another goal is current consumption of less than 0,3- 0,4 A on Receive and, based on measurements on the Alpha PCB, looks achievable.Using latching relays for LPF switching will save power. The interface to Hermes will be via SPI and I2C.

The LP Filters will be based on Alex but with only one Antenna connector. The toroids may be smaller (T38 instead of T50). Also the capacitors can have lower voltage ratings. An Antenna Tuner will also be implemented.

Q. What is the Apollo board and do I need it?

A. Apollo Discussion


Q. How is the Apollo board integrated or connected to the Hermes transceiver?

A. Via an 10 pin and 5 pin ICD ribbon cable.

Commercial Sales prohibited

Q. Who sells the OpenHPSDR boards?

A.This has yet to be decided. Hermes will initially be licensed under the non-commercial licences NCL License


Q. Can I build it into my own enclosure (chassis)?

A. Yes. The design is flexible and you are encouraged to build Hermes into whatever configuration pleases you. HPSDR hopes to offer a chassis for Hermes that will be pre-punched for all the attachments and connectors.


Q. Can I build Hermes into my own OEM product for sale?

A. No, the open hardware license allows you to build and enjoy the Hermes transceiver, however you may not build your own commercial product using the HPSDR copyrighted boards and design.


Q. How are the Hermes hardware and software legally protected?

A. Yes, Hermes will initially be licensed under the non-commercial licences NCL License


Q. Is your Intellectual Property copyrighted or otherwise protected?

A. Yes


Q. Can I purchase bare boards and populate them myself?

A. Yet to be determined.


Q. Can I buy the chips individually?

A. Yes but they are very expensive in small qualities from the manufactures


Q. Do you have a European distributor or dealer?

A. No for Hermes at this point. Some HPSDR boards are available from vendors in Europe. See manufactures links


Q. Do you have an .AU or .NZ distributor or dealer?

A. No

Compare to other SDR designs

Q. How is Hermes/Apollo different from the Flex-Radio(c) 5000, 3000, and 1500?

A. Hermes is a Generation-III SDR DDC/DUC design.


Q. What is the difference between the Hermes Mercury DDC Rx and the QuickSilver from Phil N8VB Software Radio Laboratory LLC?

A. The Hermes is a smaller more compact version of the wildly successful Atlas backplane and OpenHPSDR add-on HPSDR boards. Phil N8VB developed the initial designs of both boards.

How Do I

Q. Operating SSB

A. (operating aid information to be developed)


Q. Operating MARS

A. (operating aid information to be developed)


Q. Operating CW

A. (operating aid information to be developed)


Q. Will Hermes be a truly 'TOR' capable QSK CW rig? (where ARRL defines TOR = T/R time < 20ms)

A. Yes. Hermes operates in full duplex at all times. TOR operation depends on external factors such as T/R relay switching times and PC code latency.


Q. Will Hermes operate on popular digital modes such as PSK31, ALE, and EasyPal digital SSTV?

A. Yes, like the other OpenHPSDR boards, Hermes uses I and Q baseband data to modulate and demodulate signals. Subject to bandwith limitations ( currently 192kHz on receive and 5kHz on transmit - these can be altered by changing FPGA code) and USB data rates any current or future data mode can be used.


Q. Connect to a Linear Amplifier

A. Hermes provides a dedicated open collector PTT as well as seven general purpose open collector outputs for interfacing a linear amplifer. In addition, four 12 bit analogue inputs are provided that, via suitable signal conditioning, can be used to monitor amplifer paramaters e.g. forward power, temperature etc.


Q. Operating with a Transverter

A. Hermes provides two low level transverter outputs, one at 0mW max and the other at 500mW max. The 500mW output can be connected to an ob-board power divider, and hence to a dedicated SMA output, to enable the user to select an output below this level. A dedicated open collector PTT and seven open collector outputs can be used (with sequencing via a suitable PC GUI e.g. KISS Konsole) for transverter control.


Q. Can I record audio data

A. This feature is provided by the Flex PowerSDR(TM) Windows software.

IMPORTANT:
Hermes provides a stereo Audio Amplifier suitable for driving speakers from 3 to 8 ohms. The amplifiers are implement in a bridge configuration so that one side of the speaker must NOT be connected to earth or 0v. Connect the Left speaker to pins 1 and 2 of J16 ( or Tip and Ring of J21) and the Right speaker to pins 1 and 2 of J15 (or Tip and Ring of J22).


Q. Can I record I/Q (RF) data?

A. This feature is provided by the Flex PowerSDR(TM) Windows software.


Q. How do I record Rx audio for later playback?

A. This feature is provided by the Flex PowerSDR(TM) Windows software.

Software

Q. How do multiple receiver channels work?

A. The FPGA used by Hermes is currently the largest ( in terms of number of available gates) leaded device presently available. Since the FPGA code for the USB, transmitter, one receiver etc occupies only 30% of the device there is room for some seven additional receivers. Since each of these receivers share the one ADC then they all share the same antenna. Hence, to monitor multiple bands simualtaneously a multi-band antenna (e.g. trap vertical) or some form of diplexer will be required.

Suitable PC software John Melton can be used to configure, and display, multiple receivers.

Flexradio/openhpsdr.org/acquisition Logic Driver Download Free


Q. Can the Flex-Radio(R) PowerSDR(c) be used with Hermes?

A. Yes, Bill KD5TFD has maintained the OpenHPSDR version of PowerSDR.


Q. What is the K.I.S.S. Konsole?

A. K.I.S.S (Keep It Simple Stupid) Konsole is a straightforward PC program that will allow beginners in SDR and DSP programming to get their feet wet.

KK is intended as a learning experience and not as a competitor or replacement for any existing Console code. Where it goes and what features get added is up to you.

KISS Konsole is written in C# using the free VS 2008 IDE. The code is heavily commented and aimed at the newbie programmer. It is straight line code with as simple a format as possible.

As a novice C# programmer myself my deep gratitude to Bill, KD5TFD, Dave, WA8YWQ and Joe K5SO for their invaluable assistance in getting KK released. We also owe Phil, N8VB our thanks for making his SharpDSP library available under GPL.by Phil VK6APH.

K.I.S.S. Konsole for High Performance Software Defined RadioDeveloped from original code Copyright 2006 (C) Phil Covington, N8VB

K.I.S.S. Team Members

  • Phil Harman, VK6APH
  • David McQuate WA8YWQ
  • Joe Martin K5SO
  • George Byrkit K9TRV
  • Mark Amos W8XR
  • Gordon, KA2NLM


Q. How is Hermes software different from PowerSDR(c)?

A. It only supports OpenHPSDR hardware and provides basic receiver and transmitter functions. It does not have the rich features of PowerSDR.


Q. What have you changed in the Dttsp module?

A. KK software uses the SharpDSP routines written by Phil Covington N8VB.


Q. How do I add a feature to the GUI?

A. Which GUI?


Q. How wide is the panadapter (spectrum) display?

A. 55MHz fixed and simultaneously user selectable 48, 96 or 192kHz.


Q. Will the Hermes server and GUI work remotely from each other across the Internet?

A. Some proposed and experimental software is being developed with a server/client model.


Q. Will Hermes server and GUI work on WindowsXP, Vista, Windows-7?

A. Software development is happening at a quick pace. Watch the HPSDR email list for announcements from the volunteer authors.



Ordering and Support

Q. How do I order the Hermes board?

A. (to be determined)


Q. What is the Warranty period?

A. (to be determined)


Q. What does the warranty cover?

A. (to be determined)


Q. What support is available?

A. (to be determined)


Q. Can I subscribe to future upgrades and support options?

A. (to be determined)


Q. What shipping and insurance options are available?

A. (to be determined)

Flexradio/openhpsdr.org/acquisition Logic Driver Download


Q. How do I avoid the excessive 'VAT' tax in my country?

A. (to be determined)


Q. Do you accept payment via PayPal(R)?

A. (to be determined)

Future plans for HPSDR

Q. How can I contribute to the future success of the HPSDR project?

A. Several projects are are being proposed and developed all the time. Subscribe to the reflector, listen to teamspeak, read the website and the Wiki pages.


Q. I am a talented programmer, how can I help?

A. Several projects are are being proposed and developed all the time. Subscribe to the reflector, listen to teamspeak, read the website and the Wiki pages.


Q. What are the future plans for the OpenHPSDR Project?

A. Several projects are are being proposed and developed all the time. Subscribe to the reflector, listen to teamspeak, read the website and the Wiki pages.

NOTES

IMPORTANT:Hermes provides a stereo Audio Amplifier suitable for driving speakers from 3 to 8 ohms. The amplifiers are implement in a bridge configuration so that one side of the speaker must NOT be connected to earth or 0v. Connect the Left speaker to pins 1 and 2 of J16 ( or Tip and Ring of J21) and the Right speaker to pins 1 and 2 of J15 (or Tip and Ring of J22).

Miscellaneous

Project leaders, developers, documenters: feel free to contribute answers -- especially where it says 'TBD' or 'Answer pending.'

General Readership: have a suggested question that should be here? Email: Dave, KV0S

Retrieved from 'http://openhpsdr.org/wiki/index.php?title=FAQ&oldid=3191'




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